1. Field of the Invention
The present invention relates to an inspection apparatus for semiconductor devices and a chuck stage used for the inspection apparatus. In particular, the present invention relates to an inspection apparatus which inspects electrical characteristics of semiconductor devices having electrodes on both sides of a wafer, and a chuck stage suitable for the inspection apparatus.
2. Description of the Related Art
Power semiconductor devices, such as power transistor and IGBT (Insulated Gate Bipolar Transistor), and other semiconductor devices, such as LED and semiconductor laser, have electrodes on both sides of the wafer because they are designed so that electric currents will flow vertical to the chips. It is therefore necessary to bring test probes into contact with the surfaces on both sides of the wafer in order to inspect electrical characteristics of such semiconductor devices in wafer state. Various inspection apparatuses have been proposed to bring test probes into contact with the back side of the wafer just under the semiconductor device under test.
Japanese Patent Kokai Hei 5-333098 (JP1993/333098 A1), for example, discloses an inspection apparatus for inspecting electrical characteristics of semiconductor devices having electrodes on both sides of a wafer, in which a number of probes are placed in a chuck stage which holds a wafer, and the probes being just under the back side of the device to be tested are selectively connected to a tester.
In the inspection apparatus disclosed in the Japanese Patent Kokai No. Hei 5-333098 (JP1993/333098 A1), it is necessary to move the chuck stage with respect to the probes positioned above the wafer so as to inspect all semiconductor devices formed on the wafer one by one. The inspection apparatus therefore requires relatively long cables to connect the tester to the probes placed in the chuck stage. As the cables which connect the tester to the probes become long, parasitic inductance of measuring lines composed by the cables becomes large, and it becomes difficult to obtain transient characteristics necessary to conduct large current test close to the actual performance of the semiconductor device under test and dynamic characteristics test. Because of this, even if the semiconductor devices pass the inspection in wafer state, characteristics failure is sometimes found in them in the final full-spec inspections conducted after bonding, molding, and burn-in processes. When characteristics failure is found in the final full-spec inspections, the various processes carried out after the inspection in wafer state become useless, which invites disadvantages such as rise of product cost and increase of waste volume.
On the other hand, the Japanese Patent Kokai No. 2007-40926 (JP2007/40926 A1) and Japanese Patent Kokai No. 2008-101944 (JP2008/101944 A1) disclose inspection apparatuses, in which a semiconductor device is placed on a conductive base which is larger than the semiconductor device, and probes for back side electrodes are brought into contact with the exposed part of the base where the semiconductor device does not exist, when probes for front side electrodes are brought into contact with front surface of the semiconductor device. The inspection apparatuses disclosed in the publications are not an apparatus which inspects semiconductor devices in wafer state, but an apparatus which inspects a semiconductor device exists individually. Therefore, the publications give no suggestions about how to measure the characteristics of semiconductor devices having electrodes on both sides in wafer state accurately.
In view of the situation above mentioned, the present applicant proposed in the Japanese Patent Kokai No. 2011-138865 (JP2011/138865 A1) an inspection apparatus for inspecting semiconductor devices in wafer state, which has a chuck stage, and POGO pins electrically connected to the upper surface of the chuck stage and located at outer edge of the chuck stage. The POGO pins are brought into contact with a chuck lead plate located above and connected to a tester, thereby attempting to make short the length of a line which electrically connects back side electrodes of a wafer and the tester. The inspection apparatus makes it possible to measure accurately electrical characteristics of semiconductor devices having electrodes on both sides of the wafer, such as power semiconductor devices, in wafer state, and is preferable. However, if an inspection apparatus composed differently but being able to measure accurately in the same or almost same level as the proposed inspection apparatus is provided, which is more preferable.
The present invention was made in view of the conventional technical situation as above mentioned. The aim of the present invention is to provide an inspection apparatus for semiconductor devices which is simple in composition and is able to measure the characteristics of semiconductor devices having electrodes on both sides of a wafer accurately in wafer state, and a chuck stage used for the inspection apparatus.